Non-destructive readback and writeback for integrated circuit device
US12086460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2020 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Jan 9, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/343
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for non-destructive readback and writeback of an integrated circuit system are provided. Such a system may include an adaptive logic element including a first register pair. The first register pair may include a first register operating at a first frequency and a second register operating at a second frequency. The second frequency may be equal to or lower than the first frequency. The second register may store data from the first register. The adaptive logic element may also include a first clock providing a first clock signal to the first register and a second clock providing a second clock signal. The adaptive logic element may also include a multiplexer that may select the first clock signal or the second clock signal as a clock source for the second register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.