Apparatuses, methods, and systems for instructions for downconverting a tile row and interleaving with a register
US12086595B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2021 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Jan 12, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30098
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and apparatuses relating to interleaving data values. An embodiment includes decoding circuitry to decode a single instruction, the instruction having one or more fields to specify an opcode, one or more fields to specify a location of a first source operand, one or more fields to specify a location of a second source operand, one or more fields to specify a location of a destination operand, and one or more fields to specify an index value to be used to index a row in the first source operand, wherein the opcode is to indicate execution circuitry is to downconvert data elements of the indexed row of the first source operand, interleave the downconverted elements with data elements of the second source operand, and store the interleaved elements in the destination operand; and execution circuitry to execute the decoded instruction according to the opcode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.