Burst read with flexible burst length for on-chip memory
US12087353B2 · kind B2 · utility
0Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2022 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Dec 28, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A burst read with flexible burst length for on-chip memory, such as, for example, system cache memory, hierarchical cache memory, system memory, etc. is provided. Advantageously, successive burst reads are performed with less signal toggling and fewer bitline swings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.