Memory, chip, and method for storing repair information of memory
US12087380B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2022 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Mar 31, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/702
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This application provides a memory, a chip, and a method for storing repair information of the memory. The memory includes a repair circuit that is configured to receive a first signal from a processor and determine to be powered by a first power supply or a second power supply based on a status of the first signal, to store repair information. The repair information is information of the failed bit cells in the memory. The first power supply is zero or in a high impedance state when a system is powered off, and the second power supply is not zero when the system is powered off. The memory further comprises a processing circuit configured to perform communication between the memory and the processor based on the repair information. Therefore, the repair information of the memory can be stored even during power loss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.