Adaptive threshold for bad flash memory blocks
US12087382B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Apr 11, 2019 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Dec 16, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of tracking flash memory in a storage system is provided. The method includes initializing a bad blocks threshold value and marking one or more planes or logical unit numbers (LUNs) of flash memory as bad, responsive to determining that bad blocks in the one or more planes or LUNs meet the bad blocks threshold value. The method includes adjusting the bad blocks threshold value, responsive to exceeding a threshold number or rate of retiring planes or LUNs of flash memory, and repeating the marking and the adjusting, with the bad blocks threshold value capped at a maximum threshold value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.