Wordline driver circuit and memory
US12087398B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 19, 2022 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Jan 28, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments relate to the field of semiconductors and provide a wordline driver circuit and a memory. The wordline driver circuit at least includes a first type of wordline drivers and a second type of wordline drivers, wherein each of the wordline drivers includes a PMOS transistor and an NMOS transistor. A first type of PMOS transistors in the first type of wordline drivers and a second type of PMOS transistors in the second type of wordline drivers are configured to receive different first control signals. The first type of PMOS transistors and the second type of PMOS transistors are arranged side by side, and the NMOS transistors included in the first type of wordline drivers and the NMOS transistors included in the second type of wordline drivers are positioned on the same side of the first type of PMOS transistors and the second type of PMOS transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.