Semiconductor package
US12087696B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2023 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Jan 11, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.