Capacitance measurement circuit
US12092672B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 12, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Apr 6, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45586
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.