Patent · US Active

Read I/O processing techniques using remote mapping resolution with logical address space slicing

US12093187B1 · kind B1 · utility

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1References
20Claims
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Key dates

Filing dateMar 31, 2023
Grant dateSep 17, 2024
Priority date
Expiry dateMar 31, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/657
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Logical address space portions and virtual layer blocks (VLBs) can be partitioned into multiple sets. Each of multiple nodes in a system can be assigned exclusive ownership of one of the multiple sets. In at least one embodiment, for a read I/O which is received at a first node and directed to a logical address LA1 that is owned by a second node, the first node can request that the second owning node perform resolution processing for LA1. The second node can return either a VLB address or a PLB address based on whether the second node owns a VLB used in mapping LA1 to a corresponding physical location PA1 which includes content C1 stored at LA1. The second node can set a flag in its response to indicate whether a returned address is a VLB address or a PLB address.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.