User configurable SLC memory size
US12093547B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2021 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Dec 29, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of an electronic apparatus may include one or more substrates; and a controller coupled to the one or more substrates, the controller including logic to control access to a NAND-based storage media that includes a first cell region with a first number of levels and a second region with a second number of levels that is different from the first number of levels, determine logical block address locations that correspond to a user configurable capacity placeholder, and adjust respective sizes of the first cell region and the second cell region at runtime based on the logical block address locations. Other embodiments are disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.