Memory device, host device and method of operating the memory device
US12093569B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Dec 2, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device, a host device and a method of operating the memory device are provided. The memory device includes a data signal generator configured to provide a data signal to a transmission driver, the transmission driver configured to output a multi-level signal having any one of first to third signal levels based on the data signal, a command decoder configured to receive a feedback signal from outside of the memory device and decode the feedback signal, a data signal controller configured to adjust the data signal based on a decoding result of the command decoder, and a drive strength controller configured to adjust at least one of the first to third signal levels based on the decoding result of the command decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.