Automated circuit generation
US12093618B2 · kind B2 · utility
0Cited by
44References
20Claims
0Family size
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Key dates
| Filing date | May 8, 2023 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | May 8, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a computer-implemented method of generating a resistor comprises receiving a first resistor value, converting the resistor value into a plurality of resistor layout segments, and automatically placing the plurality of resistor layout segments based on one or more layout placement instructions to form the first resistor value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.