Relocatable FPGA modules
US12093623B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2023 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Jul 25, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logic block can be relocated without recompilation from a first area to a second area on a field-programmable gate array (FPGA) if the pattern of fabric tiles in the second area is the same as the pattern of fabric tiles in the first area, and if the two areas have the same dimensions. The design system runs synthesis, placement, and routing on a partition of a design at a first location, exports that partition to a persistent on-disk database, imports one or multiple copies of the partition into a larger design, and moves one or more of the copies from the first area to a target area in the larger design. The compatibility of the second area may be identified based on fabric tile signatures of the first area and the second area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.