Implementation of batch optimization for robust two-qubit gates for quantum computation
US12093788B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Sep 19, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N10/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure describes techniques for optimizing two-qubit gates performance in a quantum circuit of a quantum computing system. A quantum computing system selects, from qubits in the quantum circuit, a pair of target qubits on which to perform a quantum gate operation. The quantum computing system selects, from the plurality of qubits, a second plurality of qubits on which to introduce an intentional noise. The intentional noise is applied to the second plurality of qubits via a numerical optimizer. An optimized frequency is determined based on the applied intentional noise. The quantum gate operation is performed by modifying the pair of target qubits frequency to the optimized frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.