Systems and methods for coordinating processing of instructions across multiple components
US12094002B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2023 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | May 8, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q20/00
- WIPO fieldIT methods for management
- WIPO sectorElectrical engineering
Abstract
The disclosed embodiments relate to implementation of a trading system or trading system architecture having multiple transaction processors that process or execute instructions. The instructions are sent to the transaction processors before they are to be executed, so that when an instruction identifier corresponding to a pre-sent or pre-loaded instruction is sent to a transaction processor, the transaction processor can retrieve and execute the corresponding instruction without unnecessary delay, thus reducing transaction processing latency and improving computing efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.