Semiconductor integrated circuit device
US12094882B2 · kind B2 · utility
1Cited by
0References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | May 6, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/981
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a power line structure for supplying power to standard cells, buried power lines extending in the X direction are placed at a given spacing in the Y direction. A local power line extending in the Y direction is connected with the buried power lines. Metal power lines extending in the X direction are formed in an upper-layer metal interconnect layer and connected with the local power line. The spacing of placement of the metal power lines in the Y direction is greater than the spacing of placement of the buried power lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.