Method for manufacturing display substrate
US12094954B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 8, 2021 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Oct 2, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
A method for manufacturing a display substrate is provided. The method includes: forming a first active layer arranged in the NMOS transistor region and a second active layer arranged in the PMOS transistor region on the base substrate; coating one side, facing away from the base substrate, of the first active layer and one side, facing away from the base substrate, of the second active layer with a first photoresist layer, forming a first pattern layer by patterning the first photoresist layer to expose at least two ends of the first active layer; forming N-type heavily doped regions by performing N-type heavy doping on the two ends of the first active layer with the first pattern layer as a mask; forming a second pattern layer by processing the first pattern layer to expose at least a middle region of the first active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.