Semiconductor devices and method of fabricating the same
US12094974B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2023 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Apr 26, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/405
Abstract
A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.