Reset signal transmission circuits, chips, and electronic devices
US12095457B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 27, 2024 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Feb 27, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356113
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided are a reset signal transmission circuit, a chip and an electronic device. The reset signal transmission circuit comprises a level shifting circuit and a first switching circuit, wherein the level shifting circuit is configured to transmit a reset signal from a first voltage domain to a second voltage domain, and the power supply voltage of the first voltage domain is lower than the power supply voltage of the second voltage domain. The first terminal of the first switching circuit is connected to the power supply signal input terminal of the level shifting circuit, and the second terminal of the first switching circuit is connected to the reset signal output terminal of the level shifting circuit. The first switching circuit is configured to control the disconnection of a quiescent current path in the level shifting circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.