Anti-aging clock source multiplexing
US12095459B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Dec 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In certain aspects, an apparatus includes a first gating circuit having an input and an output, wherein the input of the first gating circuit is configured to receive a first clock signal. The apparatus also includes a delay circuit having an input and an output, wherein the input of the delay circuit is coupled to the output of the first gating circuit. The apparatus further includes a control circuit configured to receive an enable signal, detect a logic state at the output of the delay circuit, and cause the first gating circuit to pass or gate the first clock signal based on the enable signal and the detected logic state at the output of the delay circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.