Method and apparatus for sharing clocks between separate integrated circuit chips
US12095463B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Aug 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L25/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a plurality of integrated circuit chips located on a common substrate, each respective integrated circuit chip from among the plurality of integrated circuit chips including functional circuitry, a clock generator, clock circuitry including clock terminals at an edge of the respective integrated circuit chip, initial clock conductors configured to conduct a clock signal output by the clock generator from the clock generator to the clock terminals, and functional clock conductors configured to conduct the clock signal from the clock terminals to the functional circuitry. Each respective chip is located on the common substrate in an orientation that exposes the clock terminals on the respective chip to face corresponding clock terminals on at least one other chip among the plurality of integrated circuit chips, configured for interconnection of the plurality of integrated circuit chips into a multi-chip module with a common clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.