Patent · US Active

Measurement and control of clock signal phases

US12095470B2 · kind B2 · utility

0Cited by
0References
20Claims
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Key dates

Filing dateSep 9, 2022
Grant dateSep 17, 2024
Priority date
Expiry dateApr 1, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/0814
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Methods and apparatuses for clock signal phase measurement and control are described. In one example, a clock signal phase measurement system includes a reference clock signal line to provide a reference clock signal, a delay line to provide an output clock signal, and a wild clock. The clock signal phase measurement system includes a phase sensor configured to randomly and simultaneously sample the reference clock signal and the output clock signal utilizing the wild clock to obtain a phase data. The phase sensor is further configured to measure from the phase data a phase difference between the reference clock signal and the output clock signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.