Reducing register pressure
US12099823B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2023 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | May 17, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30112
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method, system and computer program product for reducing register pressure. Loops of a computer program with a number of live variables that exceeds a threshold number, such as the number of available registers with capacity to store data, are identified. Such identified loops may be the to be subject to high register pressure. Upon identifying such loops in the computer program, chains within each identified loop are identified, where each chain includes load and store instructions from the same induction address and where the variable offsets of the load and store instructions are loop invariants. The address expressions for the load and store instructions in the identified chains may then be modified or changed to reuse common variable offsets using an analysis and transformation process. By reusing common variable offsets, there are less variable offsets that need to be stored in the registers thereby mitigating register pressure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.