Memory device for performing in-memory processing
US12099839B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2021 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Oct 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device configured to perform in-memory processing includes a plurality of in-memory arithmetic units each configured to perform in-memory processing of a pipelined arithmetic operation, and a plurality of memory banks allocated to the in-memory arithmetic units such that a set of n memory banks is allocated to each of the in-memory operation units, each memory bank configured to perform an access operation of data requested from the in-memory arithmetic units while the pipelined arithmetic operation is performed. Each of the in-memory arithmetic units is configured to operate at a first operating frequency that is less than or equal to a product of n and a second operating frequency of each of the memory banks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.