Gate driver and display apparatus including same
US12100355B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2023 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Jul 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Provided is a gate driver including a plurality of stages, wherein each stage includes an output unit including a pull-up transistor and a pull-down transistor, and a second node controller configured to control a voltage of a second control node to which a gate of the pull-up transistor is connected, wherein the second node controller includes a first control transistor connected between the first clock terminal and the second control node and including a gate connected to the first control node, and a second control transistor including a gate connected to the gate of the first control transistor and configured to control a short circuit between the first clock terminal and a second clock terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.