Receiver receiving multi-level signal, memory device including the same and method of receiving data using the same
US12100469B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2022 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Mar 24, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A receiver that receives a multi-level signal includes a compensation circuit, a sampling circuit, an output circuit and a mode selector. The compensation circuit generates a plurality of data signals and a plurality of reference voltages by compensating intersymbol interference on an input data signal. The sampling circuit generates a plurality of sample signals based on the plurality of data signals and the plurality of reference voltages. The output circuit generates output data based on the plurality of sample signals, and selects a current value of the output data based on a previous value of the output data. The mode selector generates a mode selection signal used to select one of first and second operation modes based on an operating environment. The compensation circuit and the sampling circuit are entirely enabled in the first operation mode, and the compensation circuit and the sampling circuit are partially enabled in the second operation mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.