Computer memory arrays employing memory banks and integrated serializer/de-serializer circuits for supporting serialization/de-serialization of read/write data in burst read/write modes, and related methods
US12100473B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2022 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Nov 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Computer memory arrays employing memory banks and integrated serializer/de-serializer circuits for supporting serialization/de-serialization of read/write data in burst read/write modes, and related methods are disclosed. The memory array can include a serialization circuit configured to convert parallel data streams of read data received from separately switched memory banks into a single, serialized, read data stream in a burst read mode. The memory array can also include a de-serialization circuit configured to convert a received, serialized write data stream on an input bus for a write operation into separate, parallel write data streams to be written simultaneously to the memory banks in a burst write mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.