Methods of manufacturing semiconductor devices
US12100596B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2021 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Jan 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device includes forming an interlayer insulating layer on a substrate, forming a first mask layer on the interlayer insulating layer, forming a second mask layer and a first spacer on the first mask layer, forming a photoresist pattern on the second mask layer, forming a second mask pattern by patterning the second mask layer through a first etching process, forming a first mask pattern by patterning the first mask layer through a second etching process, forming a trench by etching a portion of the interlayer insulating layer through a third etching process, and forming an interconnection pattern within the trench. A width of the first mask pattern after the second etching process is less than a width of the photoresist pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.