Method of manufacturing semiconductor memory device
US12100617B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2023 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Apr 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor memory device is provided in the present invention, including steps of providing a substrate, forming word lines extending in a first direction in said substrate, forming bit lines extending in a second direction over said word lines, forming partition structures between said bit lines and right above said word lines, forming storage node contacts in spaces defined by said bit lines and said partition structures, wherein a portion of said storage node contact protruding from top surfaces of said bit lines and said partition structures is contact pad, forming a silicon nitride liner on said contact pads, said bit lines and said partition structures, and forming a silicon oxide layer on said silicon nitride liner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.