Dual voltage switched branch LNA architecture
US12101065B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2023 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Oct 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/7236
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.