Systems and methods for an ECC architecture with memory mapping
US12105587B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2023 |
| Grant date | Oct 1, 2024 |
| Priority date | — |
| Expiry date | Jun 30, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method including determining that a memory unit is available for a channel for communication between a storage controller and a non-volatile storage device, the memory unit being for temporary storage for encoded data for transmission through the channel; allocating the memory unit to that channel; and updating a memory mapping entry corresponding to the memory unit. The memory mapping entry is stored in the storage controller. Updating a memory mapping entry may be based on reading/write tasks. The memory mapping entry may indicate a cross channel status, an operation mode and an identifier of the channel. The method may include determining the channel being stuck due to memory shortage and mapping more memory units to the channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.