Translation lookaside buffer entry allocation system and method
US12105634B2 · kind B2 · utility
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Key dates
| Filing date | Sep 27, 2021 |
| Grant date | Oct 1, 2024 |
| Priority date | — |
| Expiry date | Sep 27, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/68
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing system includes a translation lookaside buffer (TLB). The TLB includes a plurality of TLB entries that are configured to store requested page size indications. The TLB is configured to be indexed via the requested page size indications such that a plurality of TLB requests that each indicate a same virtual address, but different respective requested page sizes are allocated respective TLB entries. As a result, in response to a TLB request that indicates a requested page size and has a virtual address that corresponds to multiple TLB entries, only a single TLB entry is identified as a TLB hit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.