Information processing device, control method, and non-transitory computer readable medium
US12106103B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2020 |
| Grant date | Oct 1, 2024 |
| Priority date | — |
| Expiry date | Apr 7, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/165
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information processing device that executes an arithmetic process includes a first processing circuit and a second processing circuit. The first processing circuit executes the arithmetic process N times consecutively. The second processing circuit executes the arithmetic process N times consecutively. N is an integer of 2 or more. The first processing circuit and the second processing circuit continue to operate according to a match between at least one result among the results of the N arithmetic processes executed by the first processing circuit and at least one result among the results of the N arithmetic processes executed by the second processing circuit. As a result, it is possible to suppress an increase in cost required for hardware and to suppress a temporary stop due to a temporary failure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.