Printed circuit board for reducing power noise and electronic device including the same
US12108523B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2022 |
| Grant date | Oct 1, 2024 |
| Priority date | — |
| Expiry date | Jan 15, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10098
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic device according to an example embodiment includes a printed circuit board (PCB) configured to connect a first electronic component and a second electronic component and block power noise in a target frequency band. The PCB may include a first signal layer including a first signal plate having a length pattern with a length corresponding to a first parameter of the target frequency band, a first ground layer including a first ground plate with a first area, a second signal layer including a second signal plate, a first dielectric having a first thickness and a first permittivity, a second ground layer including a second ground plate with a second area corresponding to a second parameter of the target frequency band, and a second dielectric having a second thickness and a second permittivity corresponding to the second parameter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.