Patent · US Active

Operation circuit having lower calibration time and calibration method thereof

US12111379B2 · kind B2 · utility

0Cited by
2References
28Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 28, 2022
Grant dateOct 8, 2024
Priority date
Expiry dateJun 1, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R35/005
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A calibration method is configured for calibrating an operation circuit which has a variant offset. The operation circuit includes at least one comparator circuit having a first variant offset. The calibration method provides an adjustable offset to calibrate the variant offset. The method includes: resetting an adjustment parameter to an initial value and configuring the operation circuit to a calibration mode; conducting an initial calibration procedure according to a comparison result of the comparator circuit, to decide an operation calibration code having plural bits; configuring the operation circuit to an operation mode; conducting a predetermined operation procedure according to the operation calibration code, wherein the operation calibration code corresponds to the adjustable offset; conducting a less bit number calibration procedure according to the adjustment parameter and a test calibration code to update the adjustment parameter or the operation calibration code; and repeating the above.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.