Reducing energy consumption of self-managed DRAM modules
US12112049B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2022 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Jan 25, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A self-managed DRAM module configured to reduce energy consumption. A module is described that includes a plurality of DDR channels and a management engine configured to read and write data blocks to DDR channels according to a process that includes: allocating a set of sub-channels for each DDR channel, wherein each sub-channel includes a subset of the set of DRAM chips; wherein a write operation of a data block includes: encoding the data block to generate an ECC codeword; and writing the ECC codeword into the subset of DRAM chips of a specified sub-channel; and wherein a read operation of the data block includes: reading the ECC codeword from the subset of DRAM chips of the specified sub-channel; and decoding the ECC codeword to obtain the data block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.