Semiconductor device including gate structure and separation structure
US12113112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2023 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Aug 22, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A semiconductor device includes first and second gate structures respectively on first and second active regions and an insulating layer between the first and second active regions and a separation structure between a first end portion of the first gate structure and a second end portion of the second gate structure and extending into the insulating layer. The separation structure includes a lower portion, an intermediate portion, and an upper portion, a maximum width of the intermediate portion in the first direction is greater than a maximum width of the lower portion in the first direction, and the maximum width of the intermediate portion is greater than a maximum width of the upper portion in the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.