Display device
US12113160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2021 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Nov 30, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to an aspect of the present disclosure, the display device includes a lower substrate and a plurality of pixel substrates disposed on the lower substrate. The display device also includes a plurality of transistors disposed on the plurality of pixel substrates and a planarization layer disposed on the plurality of pixel substrates to cover upper portions of the plurality of transistors. The display device further includes a plurality of individual connection pads and a common connection pad disposed on the planarization layer. The display device also includes a plurality of light emitting diodes disposed on the plurality of individual connection pads and the common connection pad. At least one of the plurality of individual connection pads and the common connection pad may have a multilayer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.