Differential amplifier circuit, reception circuit, and semiconductor integrated circuit
US12113494B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2022 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Jan 30, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45374
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a differential amplifier circuit, a differential amplifier circuit unit includes: first and second transistors provided between a current source circuit and a load circuit, which receives differential input signals at gates to generate differential output signals at drains; and a third transistor connected between sources of the first and second transistors, which receives a control signal at a gate. A replica amplifier circuit unit includes: a voltage generation circuit which generates first and second reference voltages; first and second replica transistors which receives the first and second reference voltages at gates to generate replica output signals at drains; a third replica transistor connected between sources of the first and second replica transistors, which receives the control signal at a gate; and an operational amplifier which generates the control signal according to a difference between at least one of the first and second reference voltages and the replica output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.