Transmitter equalization optimization for ethernet chip-to-module (C2M) compliance
US12113651B2 · kind B2 · utility
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52References
20Claims
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Key dates
| Filing date | Jul 18, 2022 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Jul 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03878
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques and apparatus for optimizing transmitter equalization are described. An example technique includes capturing a single output signal transmitted from a port on at least one channel of a host device. An impulse response of the channel is determined based at least in part on the single output signal. A transmitter feedforward equalization (FFE) is generated, based at least in part on the impulse response of the channel. The transmitter FFE is applied to the channel of the port of the host device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.