Multi-pass decoder-side motion vector refinement
US12113987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2021 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Dec 20, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/96
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An example device includes memory configured to store video data and one or more processors coupled to the memory. The one or more processors are configured to apply a multi-pass DMVR to a motion vector for a block of the video data to determine at least one refined motion vector and decode the block based on the at least one refined motion vector. The multi-pass DMVR includes a block-based first pass, a sub-block-based second pass, and a sub-block-based third pass.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.