Method for manufacturing display device, and display device
US12114540B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2018 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Jan 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/123
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device (1) includes: a substrate (2); and a first transistor (1a) formed on the substrate (2). The first transistor (1a) includes: an oxide semiconductor layer (4) formed on the substrate (2); a gate insulating layer (5) formed on the oxide semiconductor layer (4); and a gate electrode (6) formed on the gate insulating layer (5). The oxide semiconductor layer (4) includes: a conductive region (4a) provided with conductivity; a first resistance region (4b) positioned below the gate electrode (6); and a second resistance region (4c) provided between the conductive region (4a) and the first resistance region (4b), and positioned outside the gate electrode (6). The first resistance (4b) is larger in resistance than the second resistance region (4c).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.