Gate driver output protection circuit
US12119811B2 · kind B2 · utility
1Cited by
50References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2023 |
| Grant date | Oct 15, 2024 |
| Priority date | — |
| Expiry date | Mar 27, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2017/0806
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for protecting a system including a driver integrated circuit includes receiving a driver input signal. The method includes driving an output signal externally to the driver integrated circuit. The output signal is driven based on the driver input signal and an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node coupled to a terminal of the driver integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.