Circuitry comprising a loop filter
US12119834B2 · kind B2 · utility
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30Claims
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Key dates
| Filing date | Aug 30, 2022 |
| Grant date | Oct 15, 2024 |
| Priority date | — |
| Expiry date | Feb 10, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Pulse width modulation (PWM) driver circuitry comprising: a loop filter configured to receive an analog input signal and to output a digital loop filter output signal based on the analog input signal and an analog feedback signal; and a PWM modulator configured to receive a digital signal based on the digital loop filter output signal and to output a PWM signal, wherein the PWM driver circuitry further comprises a feedback path coupled to an output of the PWM driver circuitry for the analog feedback signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.