High performance computing machine and method implemented in such a HPC machine
US12124885B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Sep 1, 2022 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Nov 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2143
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A High Performance Computing (HPC) machine comprising several computing processors interconnected through at least one network, and at least one primary management unit, in a vicinity of at least one computing processor. The at least one primary management unit powers on the at least one processor. The at least one primary management unit (comprises a random data item generator, and a secure storage memory for storing a secret data item, common to all computing processors of the HPC machine, and used for authentication of each computing processor of the HPC machine for data exchange in the HPC machine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.