Semiconductor devices and electronic systems including the same
US12125791B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2021 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Dec 14, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a substrate including a memory cell region and a connection region; a plurality of gate lines vertically overlapping each other in the memory cell region of the substrate in a vertical direction, each gate line including a first metal; a stepped connection unit in the connection region and comprising a plurality of conductive pad regions, each conductive pad region including the first metal and integrally connected to a respective gate line of the plurality of gate lines; a plurality of contact structures vertically overlapping the stepped connection unit, each contact structure connected to a respectively corresponding conductive pad region of the plurality of conductive pad regions and including a second metal; and at least one metal silicide layer between at least one contact structure and the respectively corresponding conductive pad region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.