Semiconductor device including dummy conductive cells
US12125809B2 · kind B2 · utility
0Cited by
8References
20Claims
0Family size
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Key dates
| Filing date | Apr 23, 2021 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Apr 1, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming signal lines in a pair of neighboring metal layers of a semiconductor device, and forming first dummy conductive cells in an empty area without metal lines passing therethrough, between the pair of neighboring metal layers. At least two dummy conductive cells of the first dummy conductive cells that are separated from each other, and the at least two dummy conductive cells fully overlap one of the signal lines in plan view.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.