Semiconductor storage device
US12127388B2 · kind B2 · utility
0Cited by
3References
1Claims
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Assignee
Inventor
Key dates
| Filing date | Dec 1, 2021 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Jan 19, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Transistors N1, N5 corresponding to a drive transistor PD1 are formed in a cell lower part and a cell upper part, respectively, and transistors N2, N6 corresponding to a drive transistor PD2 are formed in the cell lower part and the cell upper part, respectively. A transistor P1 corresponding to a load transistor PU2 is formed in the cell lower part, and a transistor P2 corresponding to a load transistor PU1 is formed in the cell upper part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.