Method of manufacturing integrated circuit device
US12127396B2 · kind B2 · utility
0Cited by
10References
17Claims
0Family size
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Key dates
| Filing date | Jul 27, 2022 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Sep 21, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/05
Abstract
An integrated circuit device includes a plurality of semiconductor layers stacked on a substrate to overlap each other in a vertical direction and longitudinally extending along a first horizontal direction. The plurality of semiconductor layers may have different thicknesses in the vertical direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.