Patent · US Active

Latency mitigation for inter-process communication

US12131204B1 · kind B1 · utility

0Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 31, 2022
Grant dateOct 29, 2024
Priority date
Expiry dateDec 21, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/544
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

This disclosure describes techniques for latency mitigation during inter-process communication based on pre-allocating and managing shared memory. During the startup phase (e.g., prior to run-time), processes of vehicle computing systems may request to engage in communication with other processes within the vehicle computing system. Based on the request, a memory manager may determine an amount of shared memory to pre-allocate. In such examples, the amount of shared memory may be determined based on a maximum number of messages that may be “in-flight” at any single instance during run-time, and a maximum size of a message. The memory manager may pre-allocate shared memory consistent with the determined amount, and transmit a key to the requesting process. In such examples, the key may enable the process to access the pre-allocated shared memory. After the startup phase has ended, the process may read and/or write messages to and from the shared memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.